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Embedded ML, close to the metal

Current research focuses on running machine learning under real hardware constraints — FPGA acceleration for high-throughput, low-latency workloads.

SCU WIN Lab

Research Assistant — Santa Clara University — Wireless Intelligent Networks (WIN) Lab

Jul 2025 – present · Santa Clara, CA

  • Investigating FPGA-based acceleration to run machine-learning algorithms for high-throughput, low-latency workloads.
  • Training and quantizing models in PyTorch and TensorFlow, then porting them to fixed-point FPGA implementations.
  • Prototyping and optimizing FPGA implementations of wireless-communication algorithms, including signal processing and channel estimation.
  • FPGA
  • Embedded ML
  • PyTorch
  • TensorFlow
  • Signal Processing
  • Channel Estimation

Article

BALANCE: A Nonbinary Approach to Biomechanical Assistive Legs for Diverse Mobility Needs

Co-authored with a student team (one of ten authors)

Youth Innovation Journal · Fall 2025 · published Oct 29, 2025

Related article for the BALANCE design, separate from provisional patent filing No. 63/743,085.

Read the article

Autonomy & machine learning

UC Berkeley College of Engineering — ROAR Academy

Summer 2025

Trained in and programmed machine-learning systems and applied them to autonomous robotics; led by Prof. Allen Yang. Attended on a 100% scholarship.

Related: ROAR SimRace submission — a working solution for the Robot Open Autonomous Racing simulation series (Python).

ROAR SimRace on GitHub